Future Supercomputers Could Use Memory-Integrated Nanowire Transistor

Future Supercomputers Could Use Memory-Integrated Nanowire Transistor

Nanowire Transistor with Integrated Memory for Future Supercomputers is proposed by researchers.

For a long time, computer memory and processing speed have been a stumbling block in technological advancement. Memory cells may be integrated with processors in a novel breakthrough by researchers at Lund University, Sweden, which enables for speedier computations to take place in the memory circuit itself.

A memory cell and a vertical transistor selector are joined at the nanoscale in a study published in Nature Electronics, demonstrating a unique processor and memory arrangement. When compared to conventional mass storage technologies, this offers greater speed, energy efficiency, and scalability.

The core problem is that anything requiring the processing of massive volumes of data, such as ML and AI, need increased speed and capacity. It is necessary to have the memory and processor close by in order to do this. An energy-efficient method of calculating must also be possible.

The issue of calculations taking place at a considerably higher rate than the speed of the memory unit has long been recognised. This is known as a “von Neumann bottleneck” in the industry. Separate memory and calculation units are causing a snag since the data bus must wait for information to be sent back and forth.

There has been a significant advancement in CPU technology throughout the years. On the memory front, storage capacity has continually improved, but on the function side, things have remained mostly similar.

To make conventional processors, circuit boards with components arranged on a flat surface limit their capabilities. Building 3D processors vertically and integrating memory and processor are the current trends.

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